DPDK 22.11.5
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Macros | |
#define | RTE_POWER_MONITOR_OPAQUE_SZ 4 |
Typedefs | |
typedef int(* | rte_power_monitor_clb_t) (const uint64_t val, const uint64_t opaque[RTE_POWER_MONITOR_OPAQUE_SZ]) |
Functions | |
__rte_experimental int | rte_power_monitor (const struct rte_power_monitor_cond *pmc, const uint64_t tsc_timestamp) |
__rte_experimental int | rte_power_monitor_wakeup (const unsigned int lcore_id) |
__rte_experimental int | rte_power_pause (const uint64_t tsc_timestamp) |
__rte_experimental int | rte_power_monitor_multi (const struct rte_power_monitor_cond pmc[], const uint32_t num, const uint64_t tsc_timestamp) |
Advanced power management operations.
This file define APIs for advanced power management, which are architecture-dependent.
Definition in file rte_power_intrinsics.h.
#define RTE_POWER_MONITOR_OPAQUE_SZ 4 |
Size of the opaque data in monitor condition
Definition at line 22 of file rte_power_intrinsics.h.
typedef int(* rte_power_monitor_clb_t) (const uint64_t val, const uint64_t opaque[RTE_POWER_MONITOR_OPAQUE_SZ]) |
Callback definition for monitoring conditions. Callbacks with this signature will be used by rte_power_monitor()
to check if the entering of power optimized state should be aborted.
val | The value read from memory. |
opaque | Callback-specific data. |
Definition at line 38 of file rte_power_intrinsics.h.
__rte_experimental int rte_power_monitor | ( | const struct rte_power_monitor_cond * | pmc, |
const uint64_t | tsc_timestamp | ||
) |
Monitor specific address for changes. This will cause the CPU to enter an architecture-defined optimized power state until either the specified memory address is written to, a certain TSC timestamp is reached, or other reasons cause the CPU to wake up.
Additionally, an expected value (pmc->val
), mask (pmc->mask
), and data size (pmc->size
) are provided in the pmc
power monitoring condition. If the mask is non-zero, the current value pointed to by the pmc->addr
pointer will be read and compared against the expected value, and if they match, the entering of optimized power state will be aborted. This is intended to prevent the CPU from entering optimized power state and waiting on a write that has already happened by the time this API is called.
rte_cpu_get_intrinsics_support()
API call.pmc | The monitoring condition structure. |
tsc_timestamp | Maximum TSC timestamp to wait for. Note that the wait behavior is architecture-dependent. |
__rte_experimental int rte_power_monitor_wakeup | ( | const unsigned int | lcore_id | ) |
Wake up a specific lcore that is in a power optimized state and is monitoring an address.
rte_power_pause
.lcore_id | Lcore ID of a sleeping thread. |
__rte_experimental int rte_power_pause | ( | const uint64_t | tsc_timestamp | ) |
Enter an architecture-defined optimized power state until a certain TSC timestamp is reached.
rte_cpu_get_intrinsics_support()
API call.tsc_timestamp | Maximum TSC timestamp to wait for. Note that the wait behavior is architecture-dependent. |
__rte_experimental int rte_power_monitor_multi | ( | const struct rte_power_monitor_cond | pmc[], |
const uint32_t | num, | ||
const uint64_t | tsc_timestamp | ||
) |
Monitor a set of addresses for changes. This will cause the CPU to enter an architecture-defined optimized power state until either one of the specified memory addresses is written to, a certain TSC timestamp is reached, or other reasons cause the CPU to wake up.
Additionally, expected
64-bit values and 64-bit masks are provided. If mask is non-zero, the current value pointed to by the p
pointer will be checked against the expected value, and if they do not match, the entering of optimized power state may be aborted.
rte_cpu_get_intrinsics_support()
API call. Failing to do so may result in an illegal CPU instruction error.pmc | An array of monitoring condition structures. |
num | Length of the pmc array. |
tsc_timestamp | Maximum TSC timestamp to wait for. Note that the wait behavior is architecture-dependent. |