DPDK 22.11.5
rte_pmd_mlx5.h
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1/* SPDX-License-Identifier: BSD-3-Clause
2 * Copyright 2020 Mellanox Technologies, Ltd
3 */
4
5#ifndef RTE_PMD_PRIVATE_MLX5_H_
6#define RTE_PMD_PRIVATE_MLX5_H_
7
8#include <rte_compat.h>
9
18#ifdef __cplusplus
19extern "C" {
20#endif
21
22#define RTE_PMD_MLX5_FINE_GRANULARITY_INLINE "mlx5_fine_granularity_inline"
23
38__rte_experimental
39int rte_pmd_mlx5_get_dyn_flag_names(char *names[], unsigned int n);
40
41#define MLX5_DOMAIN_BIT_NIC_RX (1 << 0)
42#define MLX5_DOMAIN_BIT_NIC_TX (1 << 1)
43#define MLX5_DOMAIN_BIT_FDB (1 << 2)
63__rte_experimental
64int rte_pmd_mlx5_sync_flow(uint16_t port_id, uint32_t domains);
65
69#define MLX5_EXTERNAL_RX_QUEUE_ID_MIN (UINT16_MAX - 1000 + 1)
70
90__rte_experimental
91int rte_pmd_mlx5_external_rx_queue_id_map(uint16_t port_id, uint16_t dpdk_idx,
92 uint32_t hw_idx);
93
110__rte_experimental
112 uint16_t dpdk_idx);
113
121#define MLX5_HOST_SHAPER_FLAG_AVAIL_THRESH_TRIGGERED 0
122
141__rte_experimental
142int rte_pmd_mlx5_host_shaper_config(int port_id, uint8_t rate, uint32_t flags);
143
158__rte_experimental
159int rte_pmd_mlx5_external_sq_enable(uint16_t port_id, uint32_t sq_num);
160
161#ifdef __cplusplus
162}
163#endif
164
165#endif /* RTE_PMD_PRIVATE_MLX5_H_ */
__rte_experimental int rte_pmd_mlx5_external_rx_queue_id_unmap(uint16_t port_id, uint16_t dpdk_idx)
__rte_experimental int rte_pmd_mlx5_host_shaper_config(int port_id, uint8_t rate, uint32_t flags)
__rte_experimental int rte_pmd_mlx5_external_rx_queue_id_map(uint16_t port_id, uint16_t dpdk_idx, uint32_t hw_idx)
__rte_experimental int rte_pmd_mlx5_sync_flow(uint16_t port_id, uint32_t domains)
__rte_experimental int rte_pmd_mlx5_external_sq_enable(uint16_t port_id, uint32_t sq_num)
__rte_experimental int rte_pmd_mlx5_get_dyn_flag_names(char *names[], unsigned int n)