DPDK 22.11.4
rte_pmd_afu.h
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1/* SPDX-License-Identifier: BSD-3-Clause
2 * Copyright 2022 Intel Corporation
3 */
4
5#ifndef RTE_PMD_AFU_H
6#define RTE_PMD_AFU_H
7
17#ifdef __cplusplus
18extern "C" {
19#endif
20
21#include <stdint.h>
22
23#define RTE_PMD_AFU_N3000_NLB 1
24#define RTE_PMD_AFU_N3000_DMA 2
25
26#define NLB_MODE_LPBK 0
27#define NLB_MODE_READ 1
28#define NLB_MODE_WRITE 2
29#define NLB_MODE_TRPUT 3
30
31#define NLB_VC_AUTO 0
32#define NLB_VC_VL0 1
33#define NLB_VC_VH0 2
34#define NLB_VC_VH1 3
35#define NLB_VC_RANDOM 4
36
37#define NLB_WRLINE_M 0
38#define NLB_WRLINE_I 1
39#define NLB_WRPUSH_I 2
40
41#define NLB_RDLINE_S 0
42#define NLB_RDLINE_I 1
43#define NLB_RDLINE_MIXED 2
44
45#define MIN_CACHE_LINES 1
46#define MAX_CACHE_LINES 1024
47
48#define MIN_DMA_BUF_SIZE 64
49#define MAX_DMA_BUF_SIZE (1023 * 1024)
50
55 uint32_t mode;
56 uint32_t begin;
57 uint32_t end;
58 uint32_t multi_cl;
59 uint32_t cont;
60 uint32_t timeout;
61 uint32_t cache_policy;
62 uint32_t cache_hint;
63 uint32_t read_vc;
64 uint32_t write_vc;
65 uint32_t wrfence_vc;
66 uint32_t freq_mhz;
67};
68
73 uint32_t index; /* index of DMA controller */
74 uint32_t length; /* total length of data to DMA */
75 uint32_t offset; /* address offset of target memory */
76 uint32_t size; /* size of transfer buffer */
77 uint32_t pattern; /* data pattern to fill in test buffer */
78 uint32_t unaligned; /* use unaligned address or length in sweep test */
79 uint32_t verbose; /* enable verbose error information in test */
80};
81
86 int type; /* RTE_PMD_AFU_N3000_NLB or RTE_PMD_AFU_N3000_DMA */
87 union {
88 struct rte_pmd_afu_nlb_cfg nlb_cfg;
89 struct rte_pmd_afu_dma_cfg dma_cfg;
90 };
91};
92
97 uint32_t mode;
98 uint32_t begin;
99 uint32_t end;
100 uint32_t multi_cl;
101 uint32_t cont;
102 uint32_t timeout;
103 uint32_t trput_interleave;
104 uint32_t freq_mhz;
105};
106
111 uint32_t channel_mask; /* mask of traffic generator channel */
112};
113
114#define NUM_RND_SEEDS 3
115
120 uint32_t port;
121 uint32_t timeout;
122 uint32_t num_packets;
123 uint32_t random_length;
124 uint32_t packet_length;
125 uint32_t random_payload;
126 uint32_t rnd_seed[NUM_RND_SEEDS];
127 uint64_t src_addr;
128 uint64_t dest_addr;
129 int he_loopback;
130};
131
132#ifdef __cplusplus
133}
134#endif
135
136#endif /* RTE_PMD_AFU_H */