DPDK 22.11.5
rte_dmadev.h
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1/* SPDX-License-Identifier: BSD-3-Clause
2 * Copyright(c) 2021 HiSilicon Limited
3 * Copyright(c) 2021 Intel Corporation
4 * Copyright(c) 2021 Marvell International Ltd
5 * Copyright(c) 2021 SmartShare Systems
6 */
7
8#ifndef RTE_DMADEV_H
9#define RTE_DMADEV_H
10
147#include <stdint.h>
148
149#include <rte_bitops.h>
150#include <rte_common.h>
151#include <rte_compat.h>
152
153#ifdef __cplusplus
154extern "C" {
155#endif
156
158#define RTE_DMADEV_DEFAULT_MAX 64
159
175__rte_experimental
176int rte_dma_dev_max(size_t dev_max);
177
191__rte_experimental
192int rte_dma_get_dev_id_by_name(const char *name);
193
206__rte_experimental
207bool rte_dma_is_valid(int16_t dev_id);
208
219__rte_experimental
220uint16_t rte_dma_count_avail(void);
221
230__rte_experimental
231int16_t rte_dma_next_dev(int16_t start_dev_id);
232
234#define RTE_DMA_FOREACH_DEV(p) \
235 for (p = rte_dma_next_dev(0); \
236 p != -1; \
237 p = rte_dma_next_dev(p + 1))
238
239
244#define RTE_DMA_CAPA_MEM_TO_MEM RTE_BIT64(0)
246#define RTE_DMA_CAPA_MEM_TO_DEV RTE_BIT64(1)
248#define RTE_DMA_CAPA_DEV_TO_MEM RTE_BIT64(2)
250#define RTE_DMA_CAPA_DEV_TO_DEV RTE_BIT64(3)
257#define RTE_DMA_CAPA_SVA RTE_BIT64(4)
263#define RTE_DMA_CAPA_SILENT RTE_BIT64(5)
271#define RTE_DMA_CAPA_HANDLES_ERRORS RTE_BIT64(6)
276#define RTE_DMA_CAPA_OPS_COPY RTE_BIT64(32)
278#define RTE_DMA_CAPA_OPS_COPY_SG RTE_BIT64(33)
280#define RTE_DMA_CAPA_OPS_FILL RTE_BIT64(34)
289 const char *dev_name;
291 uint64_t dev_capa;
293 uint16_t max_vchans;
295 uint16_t max_desc;
297 uint16_t min_desc;
305 uint16_t max_sges;
307 int16_t numa_node;
309 uint16_t nb_vchans;
310};
311
327__rte_experimental
328int rte_dma_info_get(int16_t dev_id, struct rte_dma_info *dev_info);
329
340 uint16_t nb_vchans;
349};
350
370__rte_experimental
371int rte_dma_configure(int16_t dev_id, const struct rte_dma_conf *dev_conf);
372
388__rte_experimental
389int rte_dma_start(int16_t dev_id);
390
405__rte_experimental
406int rte_dma_stop(int16_t dev_id);
407
422__rte_experimental
423int rte_dma_close(int16_t dev_id);
424
463};
464
471 RTE_DMA_PORT_NONE,
473};
474
488 union {
537 __extension__
538 struct {
539 uint64_t coreid : 4;
540 uint64_t pfid : 8;
541 uint64_t vfen : 1;
542 uint64_t vfid : 16;
544 uint64_t pasid : 20;
546 uint64_t attr : 3;
548 uint64_t ph : 2;
550 uint64_t st : 16;
552 };
553 uint64_t reserved[2];
554};
555
568 uint16_t nb_desc;
585};
586
605__rte_experimental
606int rte_dma_vchan_setup(int16_t dev_id, uint16_t vchan,
607 const struct rte_dma_vchan_conf *conf);
608
616 uint64_t submitted;
620 uint64_t completed;
622 uint64_t errors;
623};
624
631#define RTE_DMA_ALL_VCHAN 0xFFFFu
632
651__rte_experimental
652int rte_dma_stats_get(int16_t dev_id, uint16_t vchan,
653 struct rte_dma_stats *stats);
654
670__rte_experimental
671int rte_dma_stats_reset(int16_t dev_id, uint16_t vchan);
672
683};
684
703__rte_experimental
704int
705rte_dma_vchan_status(int16_t dev_id, uint16_t vchan, enum rte_dma_vchan_status *status);
706
721__rte_experimental
722int rte_dma_dump(int16_t dev_id, FILE *f);
723
786};
787
795 uint32_t length;
796};
797
798#include "rte_dmadev_core.h"
799
811#define RTE_DMA_OP_FLAG_FENCE RTE_BIT64(0)
816#define RTE_DMA_OP_FLAG_SUBMIT RTE_BIT64(1)
821#define RTE_DMA_OP_FLAG_LLC RTE_BIT64(2)
853__rte_experimental
854static inline int
855rte_dma_copy(int16_t dev_id, uint16_t vchan, rte_iova_t src, rte_iova_t dst,
856 uint32_t length, uint64_t flags)
857{
858 struct rte_dma_fp_object *obj = &rte_dma_fp_objs[dev_id];
859
860#ifdef RTE_DMADEV_DEBUG
861 if (!rte_dma_is_valid(dev_id) || length == 0)
862 return -EINVAL;
863 if (*obj->copy == NULL)
864 return -ENOTSUP;
865#endif
866
867 return (*obj->copy)(obj->dev_private, vchan, src, dst, length, flags);
868}
869
903__rte_experimental
904static inline int
905rte_dma_copy_sg(int16_t dev_id, uint16_t vchan, struct rte_dma_sge *src,
906 struct rte_dma_sge *dst, uint16_t nb_src, uint16_t nb_dst,
907 uint64_t flags)
908{
909 struct rte_dma_fp_object *obj = &rte_dma_fp_objs[dev_id];
910
911#ifdef RTE_DMADEV_DEBUG
912 if (!rte_dma_is_valid(dev_id) || src == NULL || dst == NULL ||
913 nb_src == 0 || nb_dst == 0)
914 return -EINVAL;
915 if (*obj->copy_sg == NULL)
916 return -ENOTSUP;
917#endif
918
919 return (*obj->copy_sg)(obj->dev_private, vchan, src, dst, nb_src,
920 nb_dst, flags);
921}
922
952__rte_experimental
953static inline int
954rte_dma_fill(int16_t dev_id, uint16_t vchan, uint64_t pattern,
955 rte_iova_t dst, uint32_t length, uint64_t flags)
956{
957 struct rte_dma_fp_object *obj = &rte_dma_fp_objs[dev_id];
958
959#ifdef RTE_DMADEV_DEBUG
960 if (!rte_dma_is_valid(dev_id) || length == 0)
961 return -EINVAL;
962 if (*obj->fill == NULL)
963 return -ENOTSUP;
964#endif
965
966 return (*obj->fill)(obj->dev_private, vchan, pattern, dst, length,
967 flags);
968}
969
987__rte_experimental
988static inline int
989rte_dma_submit(int16_t dev_id, uint16_t vchan)
990{
991 struct rte_dma_fp_object *obj = &rte_dma_fp_objs[dev_id];
992
993#ifdef RTE_DMADEV_DEBUG
994 if (!rte_dma_is_valid(dev_id))
995 return -EINVAL;
996 if (*obj->submit == NULL)
997 return -ENOTSUP;
998#endif
999
1000 return (*obj->submit)(obj->dev_private, vchan);
1001}
1002
1028__rte_experimental
1029static inline uint16_t
1030rte_dma_completed(int16_t dev_id, uint16_t vchan, const uint16_t nb_cpls,
1031 uint16_t *last_idx, bool *has_error)
1032{
1033 struct rte_dma_fp_object *obj = &rte_dma_fp_objs[dev_id];
1034 uint16_t idx;
1035 bool err;
1036
1037#ifdef RTE_DMADEV_DEBUG
1038 if (!rte_dma_is_valid(dev_id) || nb_cpls == 0)
1039 return 0;
1040 if (*obj->completed == NULL)
1041 return 0;
1042#endif
1043
1044 /* Ensure the pointer values are non-null to simplify drivers.
1045 * In most cases these should be compile time evaluated, since this is
1046 * an inline function.
1047 * - If NULL is explicitly passed as parameter, then compiler knows the
1048 * value is NULL
1049 * - If address of local variable is passed as parameter, then compiler
1050 * can know it's non-NULL.
1051 */
1052 if (last_idx == NULL)
1053 last_idx = &idx;
1054 if (has_error == NULL)
1055 has_error = &err;
1056
1057 *has_error = false;
1058 return (*obj->completed)(obj->dev_private, vchan, nb_cpls, last_idx,
1059 has_error);
1060}
1061
1091__rte_experimental
1092static inline uint16_t
1093rte_dma_completed_status(int16_t dev_id, uint16_t vchan,
1094 const uint16_t nb_cpls, uint16_t *last_idx,
1095 enum rte_dma_status_code *status)
1096{
1097 struct rte_dma_fp_object *obj = &rte_dma_fp_objs[dev_id];
1098 uint16_t idx;
1099
1100#ifdef RTE_DMADEV_DEBUG
1101 if (!rte_dma_is_valid(dev_id) || nb_cpls == 0 || status == NULL)
1102 return 0;
1103 if (*obj->completed_status == NULL)
1104 return 0;
1105#endif
1106
1107 if (last_idx == NULL)
1108 last_idx = &idx;
1109
1110 return (*obj->completed_status)(obj->dev_private, vchan, nb_cpls,
1111 last_idx, status);
1112}
1113
1129__rte_experimental
1130static inline uint16_t
1131rte_dma_burst_capacity(int16_t dev_id, uint16_t vchan)
1132{
1133 struct rte_dma_fp_object *obj = &rte_dma_fp_objs[dev_id];
1134
1135#ifdef RTE_DMADEV_DEBUG
1136 if (!rte_dma_is_valid(dev_id))
1137 return 0;
1138 if (*obj->burst_capacity == NULL)
1139 return 0;
1140#endif
1141 return (*obj->burst_capacity)(obj->dev_private, vchan);
1142}
1143
1144#ifdef __cplusplus
1145}
1146#endif
1147
1148#endif /* RTE_DMADEV_H */
uint64_t rte_iova_t
Definition: rte_common.h:458
#define RTE_STD_C11
Definition: rte_common.h:39
__rte_experimental int rte_dma_close(int16_t dev_id)
rte_dma_direction
Definition: rte_dmadev.h:430
@ RTE_DMA_DIR_MEM_TO_DEV
Definition: rte_dmadev.h:444
@ RTE_DMA_DIR_DEV_TO_MEM
Definition: rte_dmadev.h:453
@ RTE_DMA_DIR_MEM_TO_MEM
Definition: rte_dmadev.h:435
@ RTE_DMA_DIR_DEV_TO_DEV
Definition: rte_dmadev.h:462
static __rte_experimental uint16_t rte_dma_completed(int16_t dev_id, uint16_t vchan, const uint16_t nb_cpls, uint16_t *last_idx, bool *has_error)
Definition: rte_dmadev.h:1030
__rte_experimental int rte_dma_info_get(int16_t dev_id, struct rte_dma_info *dev_info)
static __rte_experimental int rte_dma_fill(int16_t dev_id, uint16_t vchan, uint64_t pattern, rte_iova_t dst, uint32_t length, uint64_t flags)
Definition: rte_dmadev.h:954
__rte_experimental uint16_t rte_dma_count_avail(void)
static __rte_experimental int rte_dma_copy(int16_t dev_id, uint16_t vchan, rte_iova_t src, rte_iova_t dst, uint32_t length, uint64_t flags)
Definition: rte_dmadev.h:855
static __rte_experimental uint16_t rte_dma_completed_status(int16_t dev_id, uint16_t vchan, const uint16_t nb_cpls, uint16_t *last_idx, enum rte_dma_status_code *status)
Definition: rte_dmadev.h:1093
__rte_experimental int rte_dma_stats_get(int16_t dev_id, uint16_t vchan, struct rte_dma_stats *stats)
__rte_experimental int rte_dma_configure(int16_t dev_id, const struct rte_dma_conf *dev_conf)
rte_dma_status_code
Definition: rte_dmadev.h:729
@ RTE_DMA_STATUS_DESCRIPTOR_READ_ERROR
Definition: rte_dmadev.h:774
@ RTE_DMA_STATUS_INVALID_DST_ADDR
Definition: rte_dmadev.h:750
@ RTE_DMA_STATUS_PAGE_FAULT
Definition: rte_dmadev.h:781
@ RTE_DMA_STATUS_INVALID_LENGTH
Definition: rte_dmadev.h:757
@ RTE_DMA_STATUS_NOT_ATTEMPTED
Definition: rte_dmadev.h:746
@ RTE_DMA_STATUS_BUS_READ_ERROR
Definition: rte_dmadev.h:764
@ RTE_DMA_STATUS_INVALID_ADDR
Definition: rte_dmadev.h:755
@ RTE_DMA_STATUS_ERROR_UNKNOWN
Definition: rte_dmadev.h:785
@ RTE_DMA_STATUS_BUS_ERROR
Definition: rte_dmadev.h:770
@ RTE_DMA_STATUS_BUS_WRITE_ERROR
Definition: rte_dmadev.h:766
@ RTE_DMA_STATUS_DATA_POISION
Definition: rte_dmadev.h:772
@ RTE_DMA_STATUS_INVALID_OPCODE
Definition: rte_dmadev.h:762
@ RTE_DMA_STATUS_INVALID_SRC_ADDR
Definition: rte_dmadev.h:748
@ RTE_DMA_STATUS_USER_ABORT
Definition: rte_dmadev.h:738
@ RTE_DMA_STATUS_DEV_LINK_ERROR
Definition: rte_dmadev.h:779
@ RTE_DMA_STATUS_SUCCESSFUL
Definition: rte_dmadev.h:731
__rte_experimental int16_t rte_dma_next_dev(int16_t start_dev_id)
static __rte_experimental int rte_dma_copy_sg(int16_t dev_id, uint16_t vchan, struct rte_dma_sge *src, struct rte_dma_sge *dst, uint16_t nb_src, uint16_t nb_dst, uint64_t flags)
Definition: rte_dmadev.h:905
__rte_experimental int rte_dma_dev_max(size_t dev_max)
__rte_experimental int rte_dma_stats_reset(int16_t dev_id, uint16_t vchan)
__rte_experimental int rte_dma_vchan_setup(int16_t dev_id, uint16_t vchan, const struct rte_dma_vchan_conf *conf)
static __rte_experimental int rte_dma_submit(int16_t dev_id, uint16_t vchan)
Definition: rte_dmadev.h:989
__rte_experimental int rte_dma_dump(int16_t dev_id, FILE *f)
__rte_experimental bool rte_dma_is_valid(int16_t dev_id)
__rte_experimental int rte_dma_start(int16_t dev_id)
__rte_experimental int rte_dma_get_dev_id_by_name(const char *name)
rte_dma_port_type
Definition: rte_dmadev.h:470
@ RTE_DMA_PORT_PCIE
Definition: rte_dmadev.h:472
__rte_experimental int rte_dma_stop(int16_t dev_id)
rte_dma_vchan_status
Definition: rte_dmadev.h:679
@ RTE_DMA_VCHAN_HALTED_ERROR
Definition: rte_dmadev.h:682
@ RTE_DMA_VCHAN_ACTIVE
Definition: rte_dmadev.h:681
@ RTE_DMA_VCHAN_IDLE
Definition: rte_dmadev.h:680
static __rte_experimental uint16_t rte_dma_burst_capacity(int16_t dev_id, uint16_t vchan)
Definition: rte_dmadev.h:1131
uint16_t nb_vchans
Definition: rte_dmadev.h:340
bool enable_silent
Definition: rte_dmadev.h:348
uint64_t dev_capa
Definition: rte_dmadev.h:291
uint16_t max_sges
Definition: rte_dmadev.h:305
uint16_t max_vchans
Definition: rte_dmadev.h:293
uint16_t max_desc
Definition: rte_dmadev.h:295
uint16_t min_desc
Definition: rte_dmadev.h:297
const char * dev_name
Definition: rte_dmadev.h:289
uint16_t nb_vchans
Definition: rte_dmadev.h:309
int16_t numa_node
Definition: rte_dmadev.h:307
__extension__ struct rte_dma_port_param::@108::@110 pcie
enum rte_dma_port_type port_type
Definition: rte_dmadev.h:486
uint64_t reserved[2]
Definition: rte_dmadev.h:553
rte_iova_t addr
Definition: rte_dmadev.h:794
uint32_t length
Definition: rte_dmadev.h:795
uint64_t submitted
Definition: rte_dmadev.h:616
uint64_t errors
Definition: rte_dmadev.h:622
uint64_t completed
Definition: rte_dmadev.h:620
enum rte_dma_direction direction
Definition: rte_dmadev.h:566
struct rte_dma_port_param src_port
Definition: rte_dmadev.h:576
struct rte_dma_port_param dst_port
Definition: rte_dmadev.h:584