![[ICO]](/icons/blank.gif) | Name | Last modified | Size | Description |
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![[PARENTDIR]](/icons/back.gif) | Parent Directory | | - | |
![[ ]](/icons/compressed.gif) | altera-pr-ip.txt.gz | 2025-08-20 18:30 | 216 | |
![[ ]](/icons/compressed.gif) | intel-stratix10-soc-fpga-mgr.txt.gz | 2025-08-20 18:30 | 244 | |
![[ ]](/icons/compressed.gif) | altera-socfpga-fpga-mgr.txt.gz | 2025-08-20 18:30 | 321 | |
![[ ]](/icons/compressed.gif) | altera-socfpga-a10-fpga-mgr.txt.gz | 2025-08-20 18:30 | 377 | |
![[ ]](/icons/compressed.gif) | altr,socfpga-fpga2sdram-bridge.yaml.gz | 2025-08-20 18:30 | 377 | |
![[ ]](/icons/compressed.gif) | lattice-machxo2-spi.txt.gz | 2025-08-20 18:30 | 395 | |
![[ ]](/icons/compressed.gif) | xlnx,versal-fpga.yaml.gz | 2025-08-20 18:30 | 397 | |
![[ ]](/icons/compressed.gif) | fpga-bridge.yaml.gz | 2025-08-20 18:30 | 425 | |
![[ ]](/icons/compressed.gif) | lattice-ice40-fpga-mgr.txt.gz | 2025-08-20 18:30 | 457 | |
![[ ]](/icons/compressed.gif) | xlnx,zynqmp-pcap-fpga.yaml.gz | 2025-08-20 18:30 | 470 | |
![[ ]](/icons/compressed.gif) | altr,socfpga-hps2fpga-bridge.yaml.gz | 2025-08-20 18:30 | 481 | |
![[ ]](/icons/compressed.gif) | altr,freeze-bridge-controller.yaml.gz | 2025-08-20 18:30 | 501 | |
![[ ]](/icons/compressed.gif) | microchip,mpf-spi-fpga-mgr.yaml.gz | 2025-08-20 18:30 | 515 | |
![[ ]](/icons/compressed.gif) | xilinx-zynq-fpga-mgr.yaml.gz | 2025-08-20 18:30 | 522 | |
![[ ]](/icons/compressed.gif) | altera-passive-serial.txt.gz | 2025-08-20 18:30 | 532 | |
![[ ]](/icons/compressed.gif) | lattice,sysconfig.yaml.gz | 2025-08-20 18:30 | 865 | |
![[ ]](/icons/compressed.gif) | xlnx,pr-decoupler.yaml.gz | 2025-08-20 18:30 | 878 | |
![[ ]](/icons/compressed.gif) | xlnx,fpga-slave-serial.yaml.gz | 2025-08-20 18:30 | 915 | |
![[ ]](/icons/compressed.gif) | xlnx,fpga-selectmap.yaml.gz | 2025-08-20 18:30 | 964 | |
![[ ]](/icons/compressed.gif) | fpga-region.yaml.gz | 2025-08-20 18:30 | 4.2K | |
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